Mitigation of Co-channel Interference on ASIC Inter-Chip CommunicationsField/context: ASIC and Core interconnection design, wireline communications, and multiuser detection.

Background and problem: The higher on the data transmission speed between the serial the ASIC chips can produce its co-channel interference (crosstalk) exponential increased. It eventually threats the ASICs’ function performance or possibly pollutes their design function totally.
Solution: The current crosstalk model in chip design is molded as background noise, as a Gaussian distribution. This approach is usually conservative on the throughput, and not actually represents the real distribution. In fact, the crosstalk is the nearby transmitting signals coupling onto the wireline of the receiver end. Thus, the channel media can be modeled as a multiuse channel with a multiple inputs and single vector output (MISO). We can detect the desired signal and crosstalk signals jointly, then subtracting the crosstalk signals in receive end. Almost all the high speed data transmission interconnection between (or inside) chip has the same power spectral density, and with the simple baseband t...